K-Map: 卡诺图

3-variable

化简之后可得:

Solution

module top_module(
    input a, 
    input b,
    input c,
    output out
);

    // SOP form: Three prime implicants (1 term each), summed.
    // POS form: One prime implicant (of 3 terms)
    // In this particular case, the result is the same for both SOP and POS.
    assign out = (a | b | c);
    
endmodule

4-variable (1)

Solution

module top_module(
    input a,
    input b,
    input c,
    input d,
    output out  ); 

    assign out = (~a & ~b & ~c) | (~a & b & ~c & ~d) | (~a & c & ~d) | (~a & b & c) | (a & c & d) | (a & ~b & ~c);
    
endmodule

4-variable (2)

Solution

module top_module(
    input a,
    input b,
    input c,
    input d,
    output out  ); 

    assign out = (a & ~c) | (~a & ~b & c) | (a & c);
endmodule

4-variable (3)

Solution

module top_module(
    input a,
    input b,
    input c,
    input d,
    output out  ); 

    assign out = a ^ b ^ c ^ d; 
endmodule

Minimum SOP and POS

AB\CD00011110
00(0)0(1)0(3)d(2)1
01(4)0(5)0(7)1(6)0
11(12)d(13)0(15)1(14)0
10(8)d(9)0(11)d(10)0

d is don't-care, which means you may choose to output whatever value is convenient.)

对于最大项表达式,若单元格为0010(十进制 2),对应的最大项为 A+B+¬C+D(变量值为 0 时取原变量,为 1 时取反变量)。

Solution

module top_module (
    input a,
    input b,
    input c,
    input d,
    output out_sop,
    output out_pos
); 

    assign out_sop = (c & d) | (~a & ~b & c);  
    assign out_pos = (c) & (~a | b | ~c) & (~b | ~c | d);
 
endmodule

Karnaugh map (1)

Solution

module top_module (
    input [4:1] x, 
    output f );

    assign f = (~x[1] & x[3]) | (x[1] & x[2] & ~x[3]);
endmodule

Karnaugh map (2)

Solution

module top_module (
    input [4:1] x,
    output f
); 

    assign f = (~x[1] & x[3]) | (~x[2] & ~x[3] & ~x[4]) | (x[2] & x[3] & x[4]) | (x[1] & ~x[2] & ~x[4]);
endmodule

K-map implemented with a multiplexer

Solution

module top_module (
    input c,
    input d,
    output [3:0] mux_in
); 

    //根据ab的输出观察cd的每一列
    assign mux_in[0] = c | d;
    assign mux_in[1] = 0;
    assign mux_in[3] = c & d;  //注意别把第三列和第四列搞反了
    assign mux_in[2] = ~d;
    
endmodule